History

2017

The fourth version of the UDK is developed. For the first time, it offers "VIVADO drop-in IP cores" for simple and high-performance AXI4 connection to host software.

2016

Introduction and certification of a quality management system according to DIN ISO 9001: 2015

2016

Move to the new company building in Gustav-Hertz-Str. 4 in Herzogenaurach.

2009

Development of FPGA-based control electronics for a multi-parameter cytometer for a well-known biotechnology company.

2002

The first CESYS FPGA cards are on the market: a USB 1.1 card with XILINX Spartan-II FPGA and a Virtex-II minimodule.

2000

Manfred Kraus acquires all shares from Guthseel. Kraus is now the sole owner and sole managing director.

1991

Acquisition of Häußlers company shares by Kraus and Guthseel. Each of them now holds a 50% stake in the company.

1988

Development and distribution of a transputer-based parallel computing system with self-developed Parallel-C compiler.

1987

Renamed the company in CESYS GmbH due to a name conflict.

1986

Foundation of HALTEC GmbH in Erlangen by the student of computer science Manfred Kraus with his fellow students Gerd Häußler and Peter Guthseel. The company's headquarters is a 2-room apartment in a Erlanger high-rise building.