The UDK is a comprehensive concept to access CESYS FPGA boards with different host interfaces (USB, PCI or PCIe) using unique function calls. Actually supported Operating Systems: Windows 7, Windows XP, Windows Vista and LINUX. A LabView Interface is also part of the UDK. Please contact us if you need information about adaption and licensing of the UDK to non-CESYS hardware. |
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On the host-side, there is a standardized API "udkapi_vc[ver]_[arch].lib". On the FPGA-side a standardized 32-bit Wishbone-Bus interface is used. FPGA-designs and their associated PC-software run on all supported operating systems and all supported Cesys FPGA boards with no or minimal code changes. For customer specific developments we also use the UDK. Code Example: |
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#include "udkapi.h" using namespace ceUDK; void TransferSomeData(ceDevice *pDev){ // declare some variables unsigned int uiBaseAddress = 0x0; unsigned int uiWriteVal = 0x11111111; unsigned int uiReadVal = 0x0; // write, read and compare some values for(unsigned int i=0; i<4; ++i){ pDev->WriteRegister(uiBaseAddress, uiWriteVal); uiReadVal = pDev->ReadRegister(uiBaseAddress); if(uiWriteVal != uiReadVal){ throw ceException(0x80000000, "Register test failed due to data inconsistence."); } uiWriteVal <<= 1; } } int main(){ // begin of exception catch area try{ // initialize API and enumerate EFM01 boards. ceDevice::Init(); ceDevice::Enumerate(ceDevice::ceDT_USB_EFM01); // check if any device is detected if(0!=ceDevice::GetDeviceCount()){ // access first device ceDevice *pDev = ceDevice::GetDevice(0); // open device for usage pDev->Open(); // program the FPGA pDev->ProgramFPGAFromBIN("AnyUserDesign.bin"); // do some data transfer TransferSomeData(pDev); // device not needed anymore, close it pDev->Close(); For further information on Cesys FPGA boards or if you have questions, please visit our FPGA-Forum, send an E-Mail or call us: +49 9132 733 400. |