PCIS3BASE
These Spartan-3 ™ FPGA board has a PCI bus master interface. A 78-pin HD-SUB connector and a 34-pin 0,1" header can be used for connecting external signals.A slot between the FPGA and the HD-SUB connector allows to integrate additional electronic components (PIB plug-in board).Included is a standard PIB which provides 64 I / O signals with 5 volt tolerance.
The FPGA is connected to fast 32-MByte SDRAM memory. It can be used in own designs, for example as a buffer for the PCI interface.
The PCI interface of the card is driven by an external controller, the PLX PCI-9056.
The FPGA design does not need to include an PCI implementation (IP-core). The details of the PCI bus need not be known to the developer.
The Wishbone supplied sample code shows how easy the communication between the FPGA and the PC can be established.
The achievable data rates are close to the theoretical maximum.
Configuration of the FPGA is done using the PCI interface.
The necessary software is included in source code and as executable.
scope of supply:
- PCIS3BASE board
- PIB64IO plug-in-board (plugged)
- 78-pin HD-SUB connector with housing
- UDK Software on CD-ROM or for download.
FPGA family | SPARTAN-3E™ |
User I/O | The SUB-D connector provides 64 (5V-compatible) signals with the standard plug-in-board 'PIB64IO'. Organization: 8 banks x 8 bits. 28 FPGA pins are available on an 2x17pin 0,1" header. |
FPGA | XC3S1500-4FG456C |
Memory | 32 MByte SDRAM 4 Mbit SPI Flash |
Interfaces | PCI (bus-master 32-bit) JTAG connector suitable for Xilinx download cable(1) (1) not included |
Supported OS | The included software UDK (Unified Development Kit) is usable with Windows 7™ Windows XP™ and Linux™. |
Dimensions | according to PCI specifications 'short card' |
errors excepted
Changes serve the interests of technical progress.
| Documentation Ver.1.3 | 4 KB |  |
| The documentation provides pin assignments, examples and description of the included software. | ||
| Circuit diagram Ver.1.0 | 4 KB | |
| The circuit diagram is a useful source of information for questions that go beyond the documentation. It is subject to copyright and may be used only in connection with the use of our products. | ||
| PIB64IO Documentation Ver.1.4 | 4 KB | |
| In this document you will find the pin and signal assignment of the standard PIB64IO piggyback. | ||
| Connector Guide for PIB modules V.1.0 | 4 KB | |
| How to design user-specific PIB modules: pin numbering, position and orientation of the plug, name and manufacturer of the plug. | ||
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