USBS6

C1030-5510

Reduced price!

This 120 x 100 mm large-6LX Spartan FPGA card can plug into standard chassis.
There are 115 I / O signals with adjustable voltage level, two USB ports, 128 MB SDRAM and 16 MB flash memory.
Many FPGA I/O signals are routed as a differential pair impedance-controlled and can be used for LVDS signal standards.

The provided CESYS UDC (Universal Development Kit) includes USB drivers for Windows ™ (7/Vista/XP) and Linux ™, application examples of Labview, and Python, the source code of an example application, an example design in VHDL and a testing and analysis tool for function control (UDC-Lab).

The USBS6 board can be powered by the USB 2.0 Host-interface. This fast USB connection enables long-term data-rates in excess of 40 MBytes per second. For this, an on-board Cypress FX-2 USB Controller in "slave-FIFO" mode is used. You can use this method in your own designs. The example code is part of the UDK that comes with the board.

A second USB port on the card is also available. It allows data rates of up 3Mbs and the host side isdetected on the PC as a serial interface. This channel can be used to output debug information, or as an alternative to the fast USB connection

The FPGA configuration options include configuration from on-board SPI Flash memory. Therefore, the USBS6 board can be used without USB host connection. Soft-Prozessor applications are supported by an additional separate 128 Mb (16 MByte) Flash Memory. To buffer larger amounts of data a 1 Gb (128 MByte) low-power DDR SDRAM memory is available on board.

Some LEDS and a 16-way rotary switch are located in a way that allows to add a front panel or to use the board with an standard EURO-format housing (width: 100 mm).

scope of delivery:

USBS6 board
UDK Lizenz (Download)

A USB-cable is not included.

USBS6 block diagram

USBS6 Board

The USBS6 Board has a width of 100mm. This makes it easy to use the board in many standard enclosures.

FPGA

The heart of the board is a SPARTAN-6LX™ FPGA.

BGA

The 342-ball case of the XC6SLX16-2CSG324C offers many signals in small space.

USER I/O

On the 96-pin VG-connector and a 50-pin standard 0,1" header there are 115 FPGA I/O signals available.

Outgoing.

All FPGA signals are available on testpoints. During FPGA-design development they are accessible easily.

Developer-friendly

The testpoints are located in a way that standard 0,1" headers can be soldered.

USBS6 tilted view

USBS6 tilted view 1

FPGA family	SPARTAN-6LX™
FPGA	XC6SLX16-2CSG324C
User I/O	115 I/O signals on 0,1" headers and 96-pin VG-connector. Adjustable voltage level: 3,3V / 2,5V / 1,8V / user
Memory	16 Mb SPI Flash 128 Mb SPI Flash 1 Gb LPDDR SDRAM
Power supply	5 Volt DV bus-powered oder self-powered
Interfaces	480 MBit USB 2.0 (Cypress FX-2) RS232 tunneled via USB (FT232R) JTAG (for Xilinx download-cable)
Supported OS	The included software UDC (Unified Development Kit) is usable under Windows 7 ™ Windows XP ™ andLinux ™.
Dimensions	120 x 100 mm
Options	As an OEM-option, the card can be fitted with the LX25 or LX45 FPGA variants (standard is LX16). The minimum order quantity is 10 pieces for OEM products.

errors excepted
Changes serve the interests of technical progress.

Documentation Ver.1.0	2.42 MB
^{The documentation covers hardware, UDK and example FPGA designs.}
Circuit diagram Ver.1.0	148.72 KB
^{The circuit diagram is a useful source of information for questions that go beyond the documentation. It is subject to copyright and may be used only in connection with the usage of our products.}
Drawing Ver.1.0	18.37 KB

Quickguide Ver.2.0	940.67 KB